Let us design a circuit that obtains a 4-bit signed integer by calculating 4-bit additon/subtraction of a 4-bit signed integer and a 2-bit signed integer . The integers and are expressed in two's complement. The types of logic gates that you can use arc NOT, AND , OR ,and , XOR , cach of which is equipped with as many inputs as the design requires. Answer the following questions.
(1) Show the maximum and minimum values of and in decimal form.
(2) Show a circuit that calculates to obtain by combining logic gates. Organize the adder as a ripple carry adder. You can use signals from , supply voltage , and grounding voltage GND as inputs, The output should be . To simplify the diagram, use the "half-adder" blocks and the "full-adder" blocks after showing gate-level designs of both blocks.
(3) Consider adding an overflow detection mechanism to the circuit designed in (2). Show the overflow detection circuit by combining the logic gates. You can use signals from and as inputs. The output should be a 1-bit signal named ; it should be '1' when the overflow occured, or '0' otherwise.
(4) Show a circuit that calculates to obtain by combining logic gates. Organize the adder as a ripple carry adder. You can use signals from and GND as inputs. The output should be . Use the "half-adder" blocks and the "full-adder" blocks in (2).
(5) Show all the input patterns that cause overflows for the calculation designed in (4).
