The majority gate is a binary logic gate defined as follows: has inputs and output. The output is if two or three of the inputs are 1; and 0 otherwise.
When you answer circuit designs in the questions below, you can use NOT gates and constants and in addition to gates, but other gates such as AND or OR cannot be used. You should draw an gate as a rectangle labeled with , and a NOT gate as a circle, as shown in the following example:
Answer the following questions. Try to make -levels (i.e. the maximum number of serially connected gates) as small as possible in your answers.
(1) Design and depict the following logic circuits:
(a) AND of inputs,
(b) OR of inputs,
() XOR of inputs.
(2) A 1-bit full adder is defined as follows: has inputs and outputs called (sum) and (carry), respectively. and are defined so that is equal to the sum of the input bits.
Design and depict a -bit full adder . Answer its -level, too. You can use the circuits you have designed in Question (1).
(3) Design and depict a -bit full adder . Answer its -level, too.
Here takes, as inputs: (i) two unsigned -bit integers, and (ii) a carry bit.
It outputs the -bit sum. You can use the circuits you have designed in Questions (1) and (2).
(4) Design and depict a -bit multiplier . Answer its -level, too.
Here takes two unsigned -bit integers as inputs. It outputs the -bit product of the inputs. You can use the circuits you have designed in Questions (1), (2), and (3).
Classic -bit multiplier (google for images).
Connect three -bit adders in series and try not to get messed with connections.
level is: : each of three has level and there's one level of AND gates preceding 's.
