跳到主要内容

京都大学 情報学研究科 通信情報システム専攻 2024年8月実施 専門基礎A [A-4]

Author

SUN, 祭音Myyura (assisted by ChatGPT 5.4 Thinking)

Description

English text in the image

Answer all the following questions.

(1)

Answer the following questions on the number representation on a computer.

(a) Give the decimal representations of the maximum number and the minimum number that can be represented by the 5-bit two’s complement binary number system.

(b) Show the results of the following additions in the 5-bit two’s complement binary number system. If the result overflows the range of the system, just write “Overflow”.

  1. 01001 + 01101
  2. 11110 + 11001

(c) When the 4 Byte data ABCD1234 represented by hexadecimal numbers are stored in the memory system based on the byte order of the little-endian method, show the order of each byte data in the memory.

(2)

Consider the case of executing a part of a C language program (Code segment) shown in Fig. 1, on a processor with a branch prediction mechanism. In this question, when a branch is taken, the body of “for” statement or “if” statement (code enclosed in {}) is executed. Arrays A and B are declared with sufficient size, and each element is initialized with random integers. Also, during code execution, no exceptions or interrupts occur, and loop optimization is not performed.

Fig. 1 Code segment

int i;
for(i=0; i<N; i++){ /* L1 */
/* Taken path for L1 */
if(i%7 == 0){ /* L2 */
A[i] = B[i] + 1; /* Taken path for L2 */
}
if(i%7 == 1){ /* L3 */
A[i] = B[i] - 1; /* Taken path for L3 */
}
if(i%7 > 4){ /* L4 */
B[i] = B[i] * B[i]; /* Taken path for L4 */
}
}

(a) Consider executing the Code segment shown in Fig. 1 on a processor that adopts a dynamic branch predictor that predicts “whether a branch will be taken is the same as the result when the branch was last executed (it predicts not taken when the branch is executed for the first time)”. The branch histories of L1, L2, L3, and L4 are managed individually. Assuming that N is sufficiently large and can be considered infinite, calculate the branch prediction accuracy of L3 and L4, respectively.

(b) Consider executing the Code segment shown in Fig. 1 on a processor that adopts a 2-bit branch predictor. The 2-bit branch predictor uses a counter that follows the state transition diagram shown in Fig. 2 based on the branch result, remembers the branch history, and predicts “not taken” for states 00 and 01, and “taken” for states 10 and 11. Counters for managing the branch histories of L1, L2, L3, and L4 are prepared individually and the branch histories are managed individually. Also, the initial state of the 2-bit branch predictor is all 00. Assuming that N is sufficiently large and can be considered infinite, calculate the branch prediction accuracy of L3 and L4, respectively.

(c) In the case of previous question (b), if the branch histories of L2, L3, and L4 are managed with one counter without distinction (for example, when predicting the branch of L3 at i=M, the branch history of L2 at i=M and L4 at i=M-1 is used), calculate the branch prediction accuracy of L2, L3, and L4, respectively. Note that the initial state of the 2-bit branch predictor is 00.

Kai

(1)

(a) Range of 5-bit Two's Complement

  • Maximum number:
  • Minimum number:

(b) 5-bit Two's Complement Arithmetic

  • (i) Overflow (Cannot represent result in 5 bits)
  • (ii)
    • (Result is , correct)

(c) Hexadecimal Representation

34 12 CD AB

(2)

Use T for Taken, N for Not Taken.

(a) Branch Prediction (1-bit Predictor)

For L3:

i Prediction Reality Right/Wrong
0NNR
1NTW
2TNW
3NNR
4NNR
5NNR
6NNR

Accuracy: 5/7

For L4:

i Prediction Reality Right/Wrong
0NNR
1NNR
2NNR
3NNR
4NNR
5NTW
6TTR
7TNW
8NNR

Accuracy: 5/7

(b) Branch Prediction (2-bit Predictor)

For L3:

ii mod 7StatePredictionActualNext StateRight/Wrong
0000NN00R
1100NT01W
2201NN00R
3300NN00R
4400NN00R
5500NN00R
6600NN00R
7000NN00R
8100NT01W
9201NN00R
10300NN00R
11400NN00R
12500NN00R
13600NN00R

Accuracy: 6/7

For L4:

ii mod 7StatePredictionActualNext StateRight/Wrong
0000NN00R
1100NN00R
2200NN00R
3300NN00R
4400NN00R
5500NT01W
6601NT10W
7010TN01W
8101NN00R
9200NN00R
10300NN00R
11400NN00R
12500NT01W
13601NT10W

Accuracy: 4/7

(c) Branch Prediction (Detailed Trace)

i Branch State Prediction Reality Right/Wrong
0 L200NTW
L301NNR
L400NNR
1 L200NNR
L300NTW
L401NNR
2 L200NNR
L300NNR
L400NNR
i = 3: Same as i = 2
i = 4: Same as i = 2
5 L200NNR
L300NNR
L400NTW
6 L201NNR
L300NNR
L400NTW
7 L201NTW
L310TNW
L401NNR
8 L200NNR
L300NTW
L401NNR
9 L200NNR
L300NNR
L400NNR

Accuracy Summary:

  • L2: 6/7
  • L3: 5/7
  • L4: 5/7