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京都大学 情報学研究科 通信情報システム専攻 2024年8月実施 専門基礎A [A-2]

Author

SUN, 祭音Myyura (assisted by ChatGPT 5.4 Thinking)

Description

Answer all the following questions. Note that operators x\overline{\phantom{x}}, \cdot, ++, and \oplus denote logical negation, logical and, logical or, and exclusive or, respectively.

(1)

Answer the following questions on the logic function ff defined below.

f=((aˉ+cˉ+dˉ)(a+b+c+d))(bˉcˉdˉ+aˉcd+bcˉd+acˉdˉ)f = \Bigl((\bar a + \bar c + \bar d)\cdot(a+b+c+d)\Bigr) \oplus \Bigl(\bar b\cdot \bar c\cdot \bar d + \bar a\cdot c\cdot d + b\cdot \bar c\cdot d + a\cdot \bar c\cdot \bar d\Bigr)

(a) Give all minimum sum-of-products expressions of ff.

(b) Derive a logic circuit that realizes ff with the minimum number of 3-input NAND gates only. Assume a,b,c,da, b, c, d and their complements aˉ,bˉ,cˉ,dˉ\bar a, \bar b, \bar c, \bar d are available as inputs.

(c) Give all minimum product-of-sums expressions of ff.

(d) Assume logic functions

g=cˉdˉ+aˉbˉcˉ+aˉbc+aˉbˉdˉ,r=aˉdˉ.g=\bar c\cdot \bar d+\bar a\cdot \bar b\cdot \bar c+\bar a\cdot b\cdot c+\bar a\cdot \bar b\cdot \bar d, \qquad r=\bar a\cdot \bar d.

Among all the logic functions hh that satisfy

f=(gh)+r,f=(g\oplus h)+r,

derive a minimum sum-of-products expression of a logic function that has the minimum number of product terms with the minimum number of literals in its sum-of-products form. If there is no logic function hh that satisfies f=(gh)+rf=(g\oplus h)+r, state that hh does not exist.

(2)

We design a Moore-type synchronous sequential circuit that has a 1-bit input xx and a 1-bit output zz using D flip-flop(s). Every time two or more 0s are given consecutively or two or more 1s are given consecutively, the output zz is inverted in the next clock cycle. The initial state is the state where 0 has been previously inputted to xx and the output zz is 0. Table 1 shows an operation example of this sequential circuit. The initial value of D flip-flop is 0. Answer the following questions.

Table 1

clock cycle0123456789
input xx0001001111
output zz0101110010

(a) Derive a state transition diagram of this sequential circuit.

(b) Regarding the state transition diagram derived in Question (a), minimize the number of states and show the state transition table and the output table after state assignment. Explain how you verified that the number of states is minimal. Use the minimum number of D flip-flop(s) for state assignment and show the state assignment result.

(c) We implement a sequential circuit corresponding to the state transition table and the output table derived in Question (b). Derive the excitation function(s) of the D flip-flop(s) and the output function of zz in a minimal sum-of-products form. The logic variables of the input and the output of a D flip-flop are dd and qq, respectively. If multiple flip-flops are used, distinguish them by subscripts.

Kai

(1)

(a)

By simplifying ff on a 4-variable Karnaugh map, the 1-cells can be grouped as follows:

  • a group of 4 cells with a=0a=0 and d=0d=0, giving the implicant aˉdˉ\bar a \bar d,
  • a group of 4 cells with c=1c=1 and d=0d=0, giving the implicant cdˉc \bar d,
  • a group of 2 cells with b=0b=0, c=0c=0, and d=1d=1, giving the implicant bˉcˉd\bar b \bar c d.

Therefore, the minimum sum-of-products expression of ff is

f=aˉdˉ+cdˉ+bˉcˉd.f=\bar a \bar d + c \bar d + \bar b \bar c d.

This minimum SOP expression is unique.

(b)

Using

f=aˉdˉ+cdˉ+bˉcˉd,f=\bar a\bar d + c\bar d + \bar b\bar c d,

a minimum 3-input-NAND realization is:

n1=NAND(aˉ,dˉ,dˉ),n2=NAND(c,dˉ,dˉ),n3=NAND(bˉ,cˉ,d),\begin{aligned} n_1=\operatorname{NAND}(\bar a,\bar d,\bar d), \\ n_2=\operatorname{NAND}(c,\bar d,\bar d), \\ n_3=\operatorname{NAND}(\bar b,\bar c,d), \end{aligned}

and

f=NAND(n1,n2,n3).f=\operatorname{NAND}(n_1,n_2,n_3).

So the minimum number of 3-input NAND gates is 4.

(c)

To obtain the minimum product-of-sums form, group the 0-cells of the Karnaugh map:

  • a group of 4 zeros with b=1b=1 and d=1d=1, giving the maxterm (bˉ+dˉ)(\bar b + \bar d),
  • a group of 4 zeros with c=1c=1 and d=1d=1, giving the maxterm (cˉ+dˉ)(\bar c + \bar d),
  • a group of 2 zeros with a=1a=1, c=0c=0, and d=0d=0, giving the maxterm (aˉ+c+d)(\bar a + c + d).

Hence, the minimum product-of-sums expression of ff is

f=(bˉ+dˉ)(cˉ+dˉ)(aˉ+c+d).f=(\bar b+\bar d)(\bar c+\bar d)(\bar a+c+d).

This minimum POS expression is unique.

(d)

We are given

g=cˉdˉ+aˉbˉcˉ+aˉbc+aˉbˉdˉ,r=aˉdˉ,g=\bar c\bar d+\bar a\bar b\bar c+\bar a b c+\bar a\bar b\bar d, \qquad r=\bar a\bar d,

and we need a logic function hh such that

f=(gh)+r.f=(g\oplus h)+r.

First, consider the cases where r=0r=0.
In those cases, hh is uniquely determined by

h=fg.h=f\oplus g.

For the cases where r=1r=1, since

(gh)+r=1,(g\oplus h)+r=1,

the value of hh does not affect the equality as long as f=1f=1.
Thus, those cells can be treated as don't-care conditions in the Karnaugh map for hh.

Using the determined values together with the don't-care cells, the minimum sum-of-products expression is

h=dˉ+abˉcˉ+aˉbc.h=\bar d + a\bar b\bar c + \bar a b c.

This expression has the minimum number of product terms, and among them, the minimum number of literals.

(2)

(a)

(b)

The minimized Moore machine has the following four states:

  • S00S_{00}: (q1q0)=(00)(q_1q_0)=(00)
  • S01S_{01}: (q1q0)=(01)(q_1q_0)=(01)
  • S10S_{10}: (q1q0)=(10)(q_1q_0)=(10)
  • S11S_{11}: (q1q0)=(11)(q_1q_0)=(11)

The state transition table is:

Current State (q1q0q_1q_0)Next State for x=0x=0Next State for x=1x=1Output zz
S00S_{00} (00)S01S_{01} (01)S10S_{10} (10)0
S01S_{01} (01)S00S_{00} (00)S11S_{11} (11)1
S10S_{10} (10)S00S_{00} (00)S11S_{11} (11)0
S11S_{11} (11)S01S_{01} (01)S10S_{10} (10)1

The number of states is minimal because no two states are equivalent:

  • S00S_{00} and S10S_{10} have the same output, but with input x=0x=0, they go to states with different outputs.
  • S01S_{01} and S11S_{11} have the same output, but with input x=0x=0, they go to states with different outputs.
  • Any pair of states with different outputs are immediately distinguishable.

Therefore, all four states are necessary.

Since 4 states are required, the minimum number of D flip-flops is 2.

(c)

Two D flip-flops are required. Let their present-state outputs be q1,q0q_1, q_0, and their inputs be d1,d0d_1, d_0, respectively.

Using the state assignment

S00=00,S01=01,S10=10,S11=11,S_{00}=00,\quad S_{01}=01,\quad S_{10}=10,\quad S_{11}=11,

the excitation functions are

d1=xd_1=x

and

d0=xˉq1ˉq0ˉ+xˉq1q0+xq1ˉq0+xq1q0ˉ.d_0=\bar{x}\bar{q_1}\bar{q_0}+\bar{x}q_1q_0+x\bar{q_1}q_0+xq_1\bar{q_0}.

The output function is

z=q0.z=q_0.